High Current Solar Cell 17.6% Polycrystalline Silicon Solar Cell Price

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Product Description:

4 Bus Bars 156*156 17.6% efficiency poly solar cell 

PHYSICAL CHARACTERISTICS

 

Dimension:  156mm x 156mm ± 0.5mm

Wafer Thickeness:  180um+20um and 200um+20um

Front(-)                  Four 1.2mm silver busbar

                               Silicon nitride blue anti-reflection coating

                             

Back(+)                 aluminum back surface field
                                1.75mm(silver)  wide segment soldering pads

High Current Solar Cell 17.6% Polycrystalline Silicon Solar Cell Price


 Typical Electrical Characteristics

 

Efficiency

W(Pmpp)

V(Umpp)

A(Impp)

V(Uoc)

A(Isc)

17.4-17.5

4.234

0.517

8.231

0.622

8.759

17.5-17.6

4.259

0.519

8.243

0.623

8.769

17.7-17.8

4.283

0.521

8.256

0.625

8.779

17.8-17.9

4.307

0.523

8.268

0.626

8.788

17.9-18.0

4.332

0.525

8.281

0.627

8.798

18.0-18.1

4.380

0.529

8.306

0.629

8.808

18.1-18.2

4.405

0.531

8.318

0.632

8.818

18.2-18.3

4.429

0.533

8.331

0.633

8.837

18.3-18.4

4.453

0.535

8.344

0.634

8.847

18.4-18.5

4.478

0.537

8.356

0.636

8.856

18.5-18.6

4.502

0.539

8.369

0.637

8.866

 

 

 

 

Efficiency

W(Pmpp)

V(Umpp)

A(Impp)

V(Uoc)

A(Isc)

20.90-21.00

5.06

0.557

9.007

0.653

9.688

20.80-20.90

5.04

0.556

9.062

0.652

9.683

20.70-20.80

5.02

0.554

9.055

0.651

9.684

20.60-20.70

4.99

0.552

9.033

0.651

9.672

20.50-20.60

4.97

0.550

9.002

0.650

9.673

20.40-20.50

4.94

0.548

9.012

0.649

9.674

20.30-20.40

4.92

0.546

9.009

0.649

9.655

20.20-20.30

4.89

0.543

9.012

0.648

9.634

20.10-20.20

4.87

0.541

8.998

0.648

9.617

20.00-20.10

4.85

0.540

8.977

0.647

9.600


*Data under standard testing conditional (STC):1,000w/m2,AM1.5, 25°C , Pmax:Positive power tolerance.

 

3 Bus Bars 156*156 17.4% efficiency poly solar cell 

Dimension:  156 mm x 156 mm ± 0.5 mm

Wafer Thickeness: 156 mm x 156 mm ± 0.5 mm


High Current Solar Cell 17.6% Polycrystalline Silicon Solar Cell Price

Typical Electrical Characteristics:

 

Efficiency code16601680170017201740176017801800182018401860
Efficiency (%)16.616.817.017.217.417.617.818.018.218.418.6
Pmax       (W)4.044.094.144.194.234.284.334.384.434.484.53
Voc          (V)0.6120.6150.6180.6210.6240.6270.6290.630.6330.6350.637
Isc           (A)8.428.468.518.568.618.658.698.738.778.818.84
Imp         (A)7.917.998.088.168.228.278.338.388.438.488.53

* Testing conditions: 1000 W/m2, AM 1.5, 25 °C, Tolerance: Efficiency ± 0.2% abs., Pmpp ±1.5% rel.

* Imin : at 0.5 V


Production:

High Current Solar Cell 17.6% Polycrystalline Silicon Solar Cell Price



Package:


High Current Solar Cell 17.6% Polycrystalline Silicon Solar Cell Price



FAQ:

1. Q: Do you have your own factory?

   A: Yes, we have. Our factory located in Jiangsu

2. Q: How can I visit your factory?
    A: Before you visit,please contact us.We will show you the route or arrange a car to pick you up.
3. Q: Do you provide free sample?
    A: Commenly we provide paid sample.

4. Q: Could you print our company LOGO on the nameplate and package?

   A: Yes, we accept it.And need an Authorization Letter from you.

5. Q: Do you accept custom design on size?

   A: Yes, if the size is reasonable.

6. Q: How can I be your agent in my country?

   A: Please leave feedback. It's better for us to talk about details by email.

7. Q: Do you have solar project engineer who can guide me to install system?

   A: Yes, we have a professional engineer team. They can teach you how to install a solar system.




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Q:What is a good solar wafer testing equipment?
To develop solar energy, we must overcome two key challenges: cost and yield." In the solar panel manufacturing process, from the front to the back, from the crystal rod, wafer, chip to the module, any one of the links in error, will affect the number of solar panel products. Therefore, the solar cell needs to be able to monitor every step of the process in the production process of detection tools. QCROBOT also has many successful cases in this field.
Q:Geometric parameters and testing of silicon wafer
Monocrystalline silicon chip has side length 125mm, 156mm, and 125 of the large diagonal diagonal 156mm and small chamfer diagonal 165mm,Polycrystalline silicon chip to the side of the main 156mm, diagonal 219.2mm.Wafer inspection the main test items are: side, diagonal, chamfer, thickness, TTV, line, chipping, cracks, warping, oil, resistivity, lifetime.
Q:The microprocessor integrates the computer with what is on a small silicon chip
The microprocessor integrates the arithmetic and controller into a small piece of silicon.
Q:What is the cutting fluid for solar wafer cutting?
Solar wafer cuttingThe nine day of the moon is 1 | browse 4555Posted on 2011-03-08 14:06 best answerWire cutting equipment in Sweden, Japan, and domestic equipment;Sweden's MB and HCT devices are a little better;B, HCT, NTC and Ernst & Young wire cutting machine in the silicon wafer cutting silicon wafer cutting fluid and mortar requirementsLabel: cutting machine wire cutting machine silicon solar energyIn recent years, Chinese solar wafer cutting industry booming in Japan in 2008, another solar wafer multi wire cutting machine brand - Ernst & young, also started in the domestic debut, and big cost savings card, that technology has many advantages, more advanced. However, from the point of view of the effect of the use of domestic users, and NTC and MB and HCT in Switzerland, Ernst & Young in China there is a clear case of acclimatized.
Q:Why integrated circuits can be etched on silicon
Integrated circuit (integrated circuit) is a kind of micro electronic device or component. With certain techniques, the transistor, required a circuit of resistance, capacitance and inductance components and interconnect wiring together, produced in a small or a few bits of the semiconductor wafer or substrate, and then encapsulated in a tube shell, a micro structure required for the circuit function; all of them element in the structure has formed a whole, so that the electronic components to miniaturization, low power consumption, high reliability and intelligent a huge step forward. It is represented by the letter "IC" in the circuit. The inventor of the integrated circuit is Jack Kilby (based on Ge) and the (silicon based (Si) integrated circuit). Most of the semiconductor industry today is based on silicon integrated circuit.A new type of semiconductor device developed in the late 1950s of 60s. It is through oxidation, photolithography, epitaxy, diffusion, evaporation of aluminum and semiconductor manufacturing process, the connecting wire between the required circuit has a certain function of the semiconductor, resistors, capacitors and other components and they are integrated in a small piece of silicon wafer, and then welding electronic devices are encapsulated in a casing. The outer shell of the utility model is provided with a round shell type, a flat type or a double line type. IC technology includes chip manufacturing technology and design technology, mainly in the processing equipment, processing technology, packaging testing, mass production and design innovation ability.
Q:The relationship between the weight and the power of solar wafers!
The thickness of the silicon wafer is unchanged and the weight is unchanged:156*156,8 inch polycrystalline silicon chip efficiency reached 16%, single-chip power of 3.89W.This can be pushed: the thickness of the silicon wafer is 180, the efficiency is up to 16%, and the consumption of the single silicon is 3.89w*7g/w=27.23g.When the thickness of silicon wafer is 180, and the weight of silicon wafer is unchanged, the conversion rate of polycrystalline silicon chip is up to 18%, and the chip power is 156*156*0.18/1000=4.38WThis can be pushed: the thickness of the silicon wafer is 180, the weight of the silicon wafer is unchanged, and the conversion rate of the polycrystalline silicon sheet is up to 18%, and the polysilicon consumption per watt is 27.23/4.38=6.2g
Q:How to avoid or reduce the fragmentation of thin silicon wafers without wax polishing?
The wax free polishing template can ensure the free rotation of the silicon wafer in the groove of the template,
Q:After cutting a few chips, mortar density is getting lower and lower
Iron powder and silica fume more and more, the density should be more and more big, unless it is your water content is higher and higher
Q:What is a silicon wafer cutting edge material?
Online cutting process, the cutting fluid (usually polyethylene glycol) and cutting edge material sand spray with the fall in thin steel wire by thin steel wire net, high speed, make the mortar in cutting edge material and pressed online silicon rod or a silicon ingot surface high speed grinding,
Q:What is the meaning of a cleaning in a semiconductor silicon wafer process? RCA?
(4) HPM (SC-2):HCl/H2O2/H2 O from 65 to 85 DEG C is used to remove metal, iron, magnesium and other metal contamination on the surface of silicon wafer. Fe and Zn can be removed by HPM at room temperature.The first is the general idea of cleaning to remove organic contamination on silicon wafer surface, because the organic matter will cover part of the silicon surface, so that the oxide film and related contamination is difficult to remove; then the dissolution of oxide film, the oxide layer is because of "contamination trap", will also introduce epitaxial defects; finally, the removal of particulate and metal contamination, at the same time silicon surface passivation

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