Solar Cell High Quality A Grade Cell Polyrystalline 5v 17.6%

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hot sale solar cell 
1.16.8%~18.25% high efficiency 
2.100% checked quality 
3.ISO9001/ISO14001/TUV/CE/UL 
4.stable performance 


We can offer you the best quality products and services, don't miss !

 

POLY6'(156*156)

Polycrystalline Silicon Solar cell

 

Physical  Characteristics   

 

Dimension:     156mm×156mm±0.5mm

Diagonal:          220mm±0.5mm

Thickness(Si):  200±20 μm

 

Front(-)                                                              Back(+)

Blue anti-reflecting coating (silicon nitride);            Aluminum back surface field;

1.5mm wide bus bars;                                            2.0mm wide soldering pads;

Distance between bus bars: 51mm .                     Distance between bus bars :51mm .

 

Electrical Characteristics 

Efficiency(%)

18.00

17.80

17.60

17.40

17.20

16.80

16.60

16.40

16.20

16.00

15.80

15.60

Pmpp(W)

4.33

4.29

4.24

4.19

4.14

4.09

4.04

3.99

3.94

3.90

3.86

3.82

Umpp(V)

0.530

0.527

0.524

0.521

0.518

0.516

0.514

0.511

0.509

0.506

0.503

0.501

Impp(A)

8.159

8.126

8.081

8.035

7.990

7.938

7.876

7.813

7.754

7.698

7.642

7.586

Uoc(V)

0.633

0.631

0.628

0.625

0.623

0.620

0.618

0.617

0.615

0.613

0.611

0.609

Isc(A)

8.709

8.677

8.629

8.578

8.531

8.478

8.419

8.356

8.289

8.220

8.151

8.083

 

Solar Cell High Quality  A Grade Cell Polyrystalline 5v 17.6%


MONO5'(125*125mm)165

Monocrystalline silicon solar cell

 

Physical  Characteristics 

Dimension: 125mm×125mm±0.5mm

Diagonal: 165mm±0.5mm

Thickness(Si): 200±20 μm

 

Front(-)                                                                         Back(+)                                                                                                                                                                                                                                    

Blue anti-reflecting coating(silicon nitride);                        Aluminum back surface field;

1.6mmwide bus bars;                                                        2.5mm wide soldering pads;

Distance between bus bars: 61mm .                                Distance between bus bars :61mm .

 

Electrical Characteristics 

 

Efficiency(%)

19.40

19.20

19.00

18.80

18.60

18.40

18.20

18.00

17.80

17.60

17.40

17.20

Pmpp(W)

2.97

2.94

2.91

2.88

2.85

2.82

2.79

2.76

2.73

2.70

2.67

2.62

Umpp(V)

0.537

0.535

0.533

0.531

0.527

0.524

0.521

0.518

0.516

0.515

0.513

0.509

Impp(A)

5.531

5.495

5.460

5.424

5.408

5.382

5.355

5.328

5.291

5.243

5.195

4.147

Uoc(V)

0.637

0.637

0.636

0.635

0.633

0.630

0.629

0.629

0.628

0.626

0.626

0.625

Isc(A)

5.888

5.876

5.862

5.848

5.839

5.826

5.809

5.791

5.779

5.756

5.293

5.144

 

Solar Cell High Quality  A Grade Cell Polyrystalline 5v 17.6%

 

FAQ:

Q:How can i get some sample?

A:Yes , if you want order ,sample is not a problem.

 

Q:How about your solar panel efficency?

A: Our product  efficency  around 17.25%~18.25%.

 

Q:What’s the certificate you have got?

A: we have overall product certificate of ISO9001/ISO14001/CE/TUV/UL


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Q:The microprocessor integrates the computer with what is on a small silicon chip
The microprocessor integrates the arithmetic and controller into a small piece of silicon.
Q:The production of silicon units do front-line production workers harmful to the body
There are still some damage, some of the silicon wafer plant dust, strong acid, alkali, more depends on the configuration of the factory environment and labor insurance supplies
Q:Why do you want to make the wafer bigger?
Because each layer is insulated by silicon dioxide, it is equivalent to a capacitor structure. The larger the span, the greater the capacity of the wiring. The higher the frequency, the more serious side effects such as the integral effect of the long distance transmission. Basically thought GHz must use the following line width.18 technology. Chip size also affects power consumption. With the same mask and the same operating frequency, the smaller the line width, the smaller the voltage. The power consumption is proportional to the square of the voltage. Want to pursue low power you have to honestly narrow the line width. The semiconductor industry in the world are going to kill red eye, if we do not have shortcut yiwofeng to dive in.
Q:Silicon rod / wafer processing production
Another reason is that CZ is easier to produce large size single crystal silicon rods than FZ method. At present, using the method of CZ CZ main equipment: CZ growth furnace growth furnace by CZ components can be divided into four parts: (1) the furnace body comprises a quartz crucible, graphite crucible, heating and insulating element in the furnace wall (2) crystal and crucible for rotary mechanism: including seed chuck, hanging and pulled the rotating element (3) atmosphere pressure control: including gas flow control, vacuum system and pressure control valve (4) control system: including the detection sensor and computer control system processing: charging, melting, necking, shoulder growth, growth, growth and diameter growth of the tail (1) charging: the polysilicon raw materials and impurities in the quartz crucible, the type of impurity depends on the N or P type resistance. Boron, phosphorus, antimony, arsenic. (2): after the melting quartz crucible for polysilicon feedstock after long crystal furnace must be closed and vacuum filling in high purity argon to maintain a certain pressure range, and then open the graphite heater power supply, heating to the melting temperature (1420 DEG C) above, the polysilicon raw material melting. (3) necking growth: when the temperature of the silicon melt is stable, the seed is slowly immersed in the silicon melt. Because of the thermal stress in the contact between the seed and the silicon melt, the seeds will be dislocation, which must be used to reduce the growth of the crystal. Necking is the seed growth will rapidly upward, the seed crystal grows to a certain size of the reduced diameter (4-6mm) due to the dislocation line and growth axis into a corner, as long as the neck is long enough, the dislocation can grow the crystal surface, zero crystal dislocation.
Q:How to make the photoresist and silicon substrate adhesion better
By the way, if there is a reflection of the bottom, then you need to coat a layer of BARC, and then at coat PR.Hope can help you.
Q:How many times is the resistance of the same size silicon
Silicon is one of the largest and most widely used semiconductor materials, and its output and consumption mark the level of a country's electronics industry.
Q:How to make monocrystalline silicon solar cells
Diffusion bondingSolar cells require a large area of PN junction to achieve the conversion of light energy to electrical energy, while the diffusion furnace is a special equipment for manufacturing solar cell PN junction. Tube type diffusion furnace is mainly composed of quartz boat download four parts part, gas chamber, a furnace body part and a holder part etc.. Generally, the liquid source of three phosphorus oxychloride is used as the diffusion source. The P type silicon wafer is placed in a quartz tube of a tube type diffusion furnace, and three nitrogen oxychloride is used in the quartz vessel at the temperature of 850---900 degrees Celsius, and the phosphorus atom is obtained through the reaction of the phosphorus oxychloride and the silicon wafer through the reaction of the phosphorus and the phosphorus. After a certain time, the phosphorus atom from the surrounding surface layer into a silicon wafer, and wafer to internal diffusion through the void between the silicon atoms, forming a N type semiconductor and P type semiconductor interface, namely PN junction. The PN junction made by this method has good uniformity, the uniformity of box resistance is less than ten percent, and the lifetime of less than 10ms. The manufacture of PN junction is the most basic and most important process in the production of solar cells. Because it is the formation of PN junction, so that the electrons and holes in the flow is no longer back to the original place, so that the formation of the current, using the wire will lead to the current, dc.
Q:What is the specific way to clean the silicon wafer suede concrete steps
LED epitaxial wafer process:Over the past decade, in order to develop high brightness blue light-emitting diode, all over the world, the relevant research personnel are fully invested. The commercialization of products such as blue and green light-emitting diode two LED and laser diode LD application of the - III - V elements of the potential. In the current commercial LED materials and technology extension, red and green light emitting diodes are mainly epitaxy growth method of liquid phase epitaxy, and yellow, orange light emitting diode is still in vapor phase epitaxial growth method to grow P GaAs GaAsP materials.In general, the growth of GaN requires a very high temperature to interrupt the NH3 of the N-H solution, on the other hand, the kinetic simulation also learned that NH3 and MO Gas will react to produce no volatile by-products.
Q:Wafer cutting will appear thick sheet, I would like to ask what the reasons are
B. cut is not set before zero. The correct method is to set the zero (in HCT machine tool as an example): crystal rod loading machine, manual reduction worktable makes four ingot guiding strips just contact wire touch screen and click on the main interface with zero button, then slow the stage to -1.5mm real position and named set zero cutting number. If the zero position is set properly, the guide bar to the contact wire, the cutting after the start of steel wire due to friction tension instability, resulting from the start to create the knife into the chip thickness.
Q:What is the difference between the purpose of wafer cleaning and the cleaning of silicon material, what is the difference between the acid used
The silicon wafer cleaning is also known as the production of wool, chemical etching of silicon wafer surface, so that the light area

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