Solar Cell High Quality A Grade Cell Polyrystalline 5v 16.4%

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Specifications

hot sale solar cell 
1.16.8%~18.25% high efficiency 
2.100% checked quality 
3.ISO9001/ISO14001/TUV/CE/UL 
4.stable performance 


We can offer you the best quality products and services, don't miss !

 

POLY6'(156*156)

Polycrystalline Silicon Solar cell

 

Physical  Characteristics   

 

Dimension:     156mm×156mm±0.5mm

Diagonal:          220mm±0.5mm

Thickness(Si):  200±20 μm

 

Front(-)                                                              Back(+)

Blue anti-reflecting coating (silicon nitride);            Aluminum back surface field;

1.5mm wide bus bars;                                            2.0mm wide soldering pads;

Distance between bus bars: 51mm .                     Distance between bus bars :51mm .

 

Electrical Characteristics 

Efficiency(%)

18.00

17.80

17.60

17.40

17.20

16.80

16.60

16.40

16.20

16.00

15.80

15.60

Pmpp(W)

4.33

4.29

4.24

4.19

4.14

4.09

4.04

3.99

3.94

3.90

3.86

3.82

Umpp(V)

0.530

0.527

0.524

0.521

0.518

0.516

0.514

0.511

0.509

0.506

0.503

0.501

Impp(A)

8.159

8.126

8.081

8.035

7.990

7.938

7.876

7.813

7.754

7.698

7.642

7.586

Uoc(V)

0.633

0.631

0.628

0.625

0.623

0.620

0.618

0.617

0.615

0.613

0.611

0.609

Isc(A)

8.709

8.677

8.629

8.578

8.531

8.478

8.419

8.356

8.289

8.220

8.151

8.083

 

Solar Cell High Quality  A Grade Cell Polyrystalline 5v 16.4%


MONO5'(125*125mm)165

Monocrystalline silicon solar cell

 

Physical  Characteristics 

Dimension: 125mm×125mm±0.5mm

Diagonal: 165mm±0.5mm

Thickness(Si): 200±20 μm

 

Front(-)                                                                         Back(+)                                                                                                                                                                                                                                    

Blue anti-reflecting coating(silicon nitride);                        Aluminum back surface field;

1.6mmwide bus bars;                                                        2.5mm wide soldering pads;

Distance between bus bars: 61mm .                                Distance between bus bars :61mm .

 

Electrical Characteristics 

 

Efficiency(%)

19.40

19.20

19.00

18.80

18.60

18.40

18.20

18.00

17.80

17.60

17.40

17.20

Pmpp(W)

2.97

2.94

2.91

2.88

2.85

2.82

2.79

2.76

2.73

2.70

2.67

2.62

Umpp(V)

0.537

0.535

0.533

0.531

0.527

0.524

0.521

0.518

0.516

0.515

0.513

0.509

Impp(A)

5.531

5.495

5.460

5.424

5.408

5.382

5.355

5.328

5.291

5.243

5.195

4.147

Uoc(V)

0.637

0.637

0.636

0.635

0.633

0.630

0.629

0.629

0.628

0.626

0.626

0.625

Isc(A)

5.888

5.876

5.862

5.848

5.839

5.826

5.809

5.791

5.779

5.756

5.293

5.144

 

Solar Cell High Quality  A Grade Cell Polyrystalline 5v 16.4%

 

FAQ:

Q:How can i get some sample?

A:Yes , if you want order ,sample is not a problem.

 

Q:How about your solar panel efficency?

A: Our product  efficency  around 17.25%~18.25%.

 

Q:What’s the certificate you have got?

A: we have overall product certificate of ISO9001/ISO14001/CE/TUV/UL


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Q:Wafer size6 inches and 8 inches only refers to the diameter of monocrystalline silicon?
Another 6 inches =152.4mm, 8 inches =203.2mmThe following is a general standard for monocrystalline silicon wafers:6 "x09153mm is more than phi = 158 mm6.2 "x09159 mm = phi = 164 mm6.5 "x09168 mm = phi = 173 mm8 "x09203 mm = phi = 208 mm
Q:Hydrogen passivation mechanism of hydrogen fluoride HF in silicon wafer RCA cleaning process
When the concentration of NaOH is higher than 20%W/V, the corrosion rate depends mainly on the temperature of the solution, but not on the actual concentration of the alkali solution.Removal of surface oxide layer on silicon wafer by HF:
Q:Why is it not easy to use high resistance on the silicon chip integrated circuit
In some places, the resistance of the epitaxial layer is adopted, and the resistance is N type, which has a lot of inconvenience in the circuit, and the numerical value is also very difficult to do
Q:Process flow of wafer wafer ultrasonic cleaning machine?
Plasma wafer cleaning parameters:Residual plasma cleaning method of particles 1, silicon wafer surface, which comprises the following steps: firstly, gas flushing process, and then the gas plasma glow; the use of either gas from the 02, Ar, N2; gas washing process parameters set process: the chamber pressure of 10-40 mTorr, process gas flow 100-500sccm time, 1-5s; process parameters of starting process is: the chamber pressure of 1040 mTorr, process gas flow on the electrode 100-500sccm, power 250-400W, time 1-10s.2, as described in the plasma cleaning method, the invention is characterized in that the gas used is 23, plasma cleaning method, which is characterized in that the process parameters of gas flushing process is: the chamber pressure of 15 mTorr, process gas flow 300sccm, time 3S; process parameters of starting process is: the chamber pressure of 15 mTorr, process gas flow on the electrode 300sccm, power 300W, time Ss.4, plasma cleaning method, which is characterized in that the process parameters of gas flushing process is: the chamber pressure of 10-20 mTorr, process gas flow 100-300sccm, time 1-5s; process parameters of starting process is: the chamber pressure of 10-20 mTorr, process gas flow on the electrode 100-300sccm, power 250-400W, when Lu 1-5s.
Q:Light doped and heavily doped silicon wafers
Is divided into light heavy doping, which is related to the amount of doping
Q:Is the thickness of solar cell silicon wafer certain? Specifically how much
140-230 bar, see the specific requirements, most of the requirements of 200
Q:What is the silicon wafer, the specific definition of what?
Silicon wafers are the raw materials for making transistors and integrated circuits
Q:What's the connection between silicon wafer and wafer
Why is the semiconductor wafer has to be large because he wants to cut into small square chips
Q:How is the wafer appearance caused? The performance of the chip half white, a class of black! Seek help!
You should be the color difference problem is caused by the mortar temperature cutting room temperature and workshop temperature also influenced to reduce this effect only from the cleaning rod to minimize the time spent between, this is the enthusiasm of the staff problem
Q:How to deal with silicon wafer annealing
Why anneal? One reason is that silicon contains oxygen, oxygen has the role of absorbing impurities. The oxygen near the surface of the silicon wafer can be removed from the surface during annealing, so as to reduce the number of impurities near the surface. Facilitates device fabrication;Annealing has a certain influence on the resistivity and minority lifetime.For reference.

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